The present invention generally relates to the processing of materials, and more particularly to substrates for electronics, optics or optoelectronics.
More precisely, the invention relates to a process for detaching two layers of material according to a weakened zone defined between the two layers. This process comprises thermal annealing of a structure of the layers, wherein the annealing brings the temperature from a starting annealing temperature to a final annealing temperature in a controlled and defined manner.
Processes of the type mentioned above are already known in general. In particular it is known to utilize these processes for detaching two layers of material coming from the same substrate, between which a weakened zone has been previously defined by implantation of species in the substrate. The implanted species can be ions or atoms. It is thus known to implant a substrate of a semiconductor material such as silicon with a species such as hydrogen or helium to obtain this weakened zone.
The weakened zone is determined as a function of the nature of the material, the nature of the implanted species and the implantation energy (this weakened zone typically being a plane or zone oriented parallel to the implantation face of the substrate).
It is also possible to produce the weakened zone by other means generally known per se, for example by constructing an intermediate region of a porous material between two regions of dense material, by constituting a layer of oxide embedded in a substrate (for example a substrate of silicon-on-insulator or SOI type), or even by bonding together two layers, with the bonding interface serving as the weakened zone.
The detachment of two layers at the weakened zone can be used to create thin layers (whose thickness can be between a fraction of a micron and several microns), as is described for example in U.S. Pat. No. 5,374,564.
This document describes a process known under the generic name of SMART-CUT®, the aim of which is to manufacture structures of the Silicon On Insulator (“SOI”) type. The main steps in this process are the following:
formation of an oxide layer in a so-called upper plate of silicon, where the oxide layer corresponds to an embedded oxide layer of a SOI structure,
ionic implantation of hydrogen or other ions in this upper plate so as to create the weakened zone, and to delimit the SOI structure by this zone on the one hand (i.e., the layer situated on one side of the weakened zone which includes the embedded oxide layer), while defining a silicon heel or reusable silicon substrate on the other side of the weakened zone,
adhering, preferably by molecular bonding, the upper plate onto a support plate called a stiffener which can be made of silicon or another semiconductor material, and
heating the structure with a view to detach and obtain an SOI structure comprising, as one layer, the stiffener or support plate, the embedded oxide layer and the layer of silicon located between the embedded oxide and the weakened zone, while also providing, as the other layer, the silicon heel located on the other side of the weakened zone, which heel can be re-used in further operations, e.g., to transfer further layers of silicon to other support substrates or stiffeners.
In this respect, the heating can be one that provides complete detachment, with the SOI and the heel effectively exiting from the annealing oven detached and as separate components, or if the thermal budget is not sufficient to complete the annealing, to aid only in effecting a separation between the SOI and the heel due to the formation of microcavities, microbubbles or microcracks in the weakened zone. The separation corresponds to a condition or state preceding detachment in which the SOI and the heel are still attached by Van der Waals force type bonds, or again by a simple suction effect of the two parts to be detached.
In this case, detachment is finalized and completed after the initial heating, for example, by introducing mechanical energy (such as the introduction of a projecting element such as a blade at the level of the weakened zone, etc.), or by further heating of the structure.
A complementary processing such as polishing is then conducted to reduce the roughness of the surface of the SOI which originates from splitting and detachment. It is usual to find roughness specifications not exceeding 5 Angstroms in root mean square (“rms”) value. The measures of roughness are generally made by an atomic force microscope (“AFM”). With this type of instrument, roughness is measured on surfaces swept by the points of the AFM, ranging from 1×1 μm2 to 10×10 μm2 and less frequently 50×50 μm2, or even 100×100 μm2. It is also possible to measure the surface roughness by other methods, in particular by the bias of a haze measurement.
This method has the particular advantage of enabling rapid characterization of the uniformity of roughness on the entire surface. This haze, measured in ppm, originates from a method utilizing the properties of optical reflectivity of the surface to be characterized, and corresponds to an optical base noise diffused by the surface, in terms of its microroughness. An example of a graph illustrating the relationship between the haze and the roughness of this surface for an SOI surface is shown in FIG. 1.
The SMART-CUT® process can also be used to constitute structures other than SOI, for example Silicon On Anything (“SOA), or even Anything On Anything (“AOA”), i.e., any material on any other material which is the same or different.
The known processes of detachment by heating generally utilize an annealing step for inducing the structure comprising the two layers to detach. This step starts at a relatively low initial heating temperature, which may be for example on the order of 350° C., to a higher detachment temperature though not exceeding a value on the order of 500° C., with a temperature evolution in the annealing oven increased in a substantially constant manner at a rate on the order of 10° C. per minute.
The detachment temperature for these detachment annealings of the prior art corresponds to a final annealing temperature. Therefore, the known detachment annealings are performed with temperature evolution according to a substantially constant temperature ramp up, with the gradient of this ramp being on the order of 10° C./min. But it is often noticed that the surfaces originating from detachment (that is, the surfaces of the two layers opposite both sides of the weakened zone after detachment) exhibit a relatively pronounced degree of roughness, thus requiring significant additional processing to be conducted in order to attain the desired surface state for further use of the components. For example, in the event of detachment of the layers of a plate of material such as silicon for constituting a SOI, completion of detachment generally results in roughness of the order of 80 Angstroms rms (in AFM measure on a field of 10*10 microns).
In order to further process the detached material, as well as to reuse the wafer from which the layer has been detached, there is a need for improving the surface roughness of these components while minimizing or without having to perform the additional processing steps.
In addition, with the known detachment annealing processes, degradation of the peripheral potions of the structures to be detached is also observed. FIG. 2 illustrates the typical result of microscopic observation of the peripheral edge of the surface of an SOI after its detachment by annealing according to the prior art, with the peripheral region being called a crown or rim. This drawing shows numerous structural irregularities in the SOI crown. This figure illustrates degradation of the SOI crown, with this degradation being consequent to the detachment annealing and being applicable to structures other than SOI. Accordingly, it also would be beneficial to prevent, or at least reduce, such degradation noticed as a consequence of annealing detachment.
These disadvantages of the prior art are now remedied by the present invention.